sk Skill · prasetyarobert205-jpg
run-fpga-workflow
Evidence-driven FPGA/SoC FPGA workflow for architecture, cycle-accurate RTL, registers, CDC/RDC, timing, three-vendor toolflows, verification, board evidence, single-writer implementation, and independent sign-off. Use only for FPGA and directly related hardware/firmware/verification tasks.
Open on skills.sh ↗read 2026-09-15
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